cmlt5078e npn/pnp cmlt5087e pnp/pnp cmlt5088e npn/npn enhanced specification surface mount silicon dual transistors description: the central semiconductor cmlt5078e, cmlt5087e, and cmlt5088e, are silicon transistors in a picomini? surface mount package with enhanced specifications designed for applications requiring high gain and low noise. maximum ratings: (t a =25 o c) symbol units collector-base voltage v cbo 50 v collector-emitter voltage v ceo 50 v emitter-base voltage v ebo 5.0 v continuous collector current i c 100 ma power dissipation p d 350 mw operating and storage junction temperature t j , t stg -65 to +150 o c thermal resistance ja 357 o c/w electrical characteristics per transistor: (t a =25 o c unless otherwise noted) typ symbol test conditions min npn pnp max units i cbo v cb =20v 50 na i ebo v eb =3.0v 50 na bv cbo i c =100a 50 135 150 v bv ceo i c =1.0ma 50 65 105 v bv ebo i e =100a 5.0 8.7 7.5 v v ce(sat) i c =10ma, i b =1.0ma 45 50 100 mv v ce(sat) i c =100ma, i b =10ma 110 225 400 mv v be(sat) i c =10ma, i b =1.0ma 700 700 800 mv h fe v ce =5.0v, i c =0.1ma 300 430 390 900 h fe v ce =5.0v, i c =1.0ma 300 435 380 h fe v ce =5.0v, i c =10ma 300 430 350 h fe v ce =5.0v, i c =100ma 50 125 75 f t v ce =5.0v, i c =500a, f=20mhz 100 mhz c ob v cb =5.0v, i e =0, f=1.0mhz 4.0 pf c ib v be =0.5v, i c =0, f=1.0mhz 15 pf h fe v ce =5.0v, i c =1.0ma, f=1.0khz 350 1400 nf v ce =5.0v, i c =100a, r s =10k, f=10hz to 15.7khz 3.0 db marking code & configuration: cmlt5078e: dual, complementary: l78 cmlt5087e: dual, pnp: l87 cmlt5088e: dual, npn: l88 ? ? enhanced specification. ?? additional enhanced specification. ?? ?? ? ? ? ? ? ? ? ? ? sot-563 case r3 (20-january 2010) www.centralsemi.com
cmlt5078e npn/pnp cmlt5087e pnp/pnp cmlt5088e npn/npn enhanced specification surface mount silicon dual transistors sot-563 case - mechanical outline cmlt5087e cmlt5088e marking code: l87 marking code: l78 marking code: l88 lead code: 1) emitter q1 2) base q1 3) collector q2 4) emitter q2 5) base q2 6) collector q1 cmlt5078e pin configurations www.centralsemi.com r3 (20-january 2010)
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